A Nanowire Transistor for High Performance Logic and Terabit Non-Volatile Memory Devices

Author

Lee, Hyunjin ; Ryu, Seong-Wan ; Han, Jin-Woo ; Yu, Lee-eun ; Im, Maesoon ; Kim, Chungjin ; Kim, Sungho ; Lee, Eujune ; Kim, Kuk-Hwan ; Kim, Ju-Hyun ; Bae, Dong-Il ; Jeon, Sang Cheol ; Kim, Kwang Hee ; Lee, Gi Sung ; Oh, Jae Sub ; Park, Yun Chang ; Bae, Wo

Author_Institution

Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

2007

fDate

12-14 June 2007

Firstpage

144

Lastpage

145

Abstract

Silicon nanowire-FET (SiNAWI-FET) for high performance logic device with consideration of current direction effects and terabit non-volatile memory (NVM) device using an 8 nm SiNAWI-NVM with oxide/nitride/oxide (ONO) and omega-gate structure is reported for the first time. N-and P-channel SiNAWI-FET showed the highest driving current on (110)/<110> crystal orientation without device rotation, whereas most 3-dimensional NMOS report higher driving current on 45deg device rotation rather than 0deg. Utilizing an 7 nm spherical nanowire on the 8 nm SiNAWI-NVM with ONO structure, 1.7 V V_T-window was achieved from 12 V/80 musec program conditions with retention enhancement.

Keywords

elemental semiconductors; field effect transistors; logic devices; nanowires; random-access storage; silicon; 3-dimensional NMOS; crystal orientation; high performance logic device; omega-gate structure; retention enhancement; silicon nanowire-FET; terabit nonvolatile memory devices; Fabrication; FinFETs; Logic devices; MOS devices; Nanoscale devices; Nanostructures; Nonvolatile memory; Scalability; Silicon; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2007 IEEE Symposium on

Conference_Location

Kyoto

Print_ISBN

978-4-900784-03-1

Type

conf

DOI

10.1109/VLSIT.2007.4339761

Filename

4339761