DocumentCode
348608
Title
A DDS synthesizer with time domain interpolator
Author
Rahkonen, Timo ; Eksyma, Harri ; Repo, Heikki
Author_Institution
Electron. Lab., Oulu Univ., Finland
Volume
1
fYear
1999
fDate
1999
Firstpage
327
Abstract
A DDS type circuit structure for producing a numerically programmable square wave clock signal is presented. The high speed D/A converter needed in conventional DDS systems is replaced by a 32-tap digital-to-time interpolator that effectively increases the sampling rate to over 1 GHz. Thus the circuit can be used up to full clock rate without image filtering. A prototype IC with fclk of 30 MHz and SFDR of -40 dBc up to 10 MHz and -33 dBc up to 15 MHz has been designed and tested
Keywords
CMOS digital integrated circuits; application specific integrated circuits; direct digital synthesis; high-speed integrated circuits; interpolation; square-wave generators; 0.8 micron; 10 to 40 MHz; 2.8 V; DDS synthesizer; digital-to-time interpolator; full clock rate use; full custom CMOS ICs; interpolating DDS; numerically programmable clock signal; sampling rate; square wave clock signal; time domain interpolator; Circuits; Clocks; Delay; Frequency modulation; Image converters; Interpolation; Oscillators; Synthesizers; Table lookup; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location
Pafos
Print_ISBN
0-7803-5682-9
Type
conf
DOI
10.1109/ICECS.1999.812289
Filename
812289
Link To Document