• DocumentCode
    348612
  • Title

    Generalized symmetric and generalized pseudo-symmetric functions

  • Author

    Chrzanowska-Jeske, Malgorzata

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Portland State Univ., OR, USA
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    343
  • Abstract
    We introduce generalized symmetric and generalized pseudo-symmetric functions which can be represented as regular two-dimensional linear arrays. It is possible due in part to generalized symmetries, which can be used when functions are represented using exor-based decompositions. We also identify and use local symmetries. Therefore, a large group of non-symmetric functions can be implemented using the same efficient regular locally-connected structures which are used for totally symmetric functions. Because of the regularity, layout parameters such as area, interconnect length and delay can be very accurately estimated during the prelayout synthesis stages, which is critically important for deep-submicron technologies
  • Keywords
    Boolean functions; decision diagrams; integrated circuit layout; logic arrays; logic design; symmetric switching functions; area estimation; deep-submicron technologies; delay estimation; exor-based decompositions; generalized pseudosymmetric functions; generalized symmetric functions; interconnect length estimation; layout parameters; local symmetries; prelayout synthesis stages; regular 2D linear arrays; regular locally-connected structures; two-dimensional linear arrays; Boolean functions; Data structures; Delay; Design methodology; Design optimization; Logic design; Logic devices; Multiplexing; Routing; Tiles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
  • Conference_Location
    Pafos
  • Print_ISBN
    0-7803-5682-9
  • Type

    conf

  • DOI
    10.1109/ICECS.1999.812293
  • Filename
    812293