Adaptable caching techniques for reconfigurable computing systems

Applications for small economic mobile machines (e.g., security, search and rescue, medical imaging, storm tracking, or space exploration) require low-cost real-time digital signal processing (DSP) computing systems. There has been an increase in the migration of DSP algorithms to reconfigurable computing (RC) platforms to solve this problem. Unfortunately, the bottleneck due to limiting I/O becomes more prominent as FPGA density increases. This drives a need for data caching in RC to reach significant speed-ups with little cost. In this paper, a method is introduced to enhance performance execution of computationally intense DSP algorithms on loosely coupled RC systems by adaptable caching. Hence, the exploitation of application-specific locality-of-reference has the potential to achieve at least a two-fold increase in performance without a dramatic rise in cost. Moreover, high-level language compilers with the addition of an adaptable caching technique provide better usage of hardware resources for ordinary users.