• DocumentCode
    3487200
  • Title

    A simple approach for designing online testable reversible circuits

  • Author

    Nayeem, N.M. ; Rice, J.E.

  • Author_Institution
    Dept. of Math & Comput. Sci., Univ. of Lethbridge, Lethbridge, AB, Canada
  • fYear
    2011
  • fDate
    23-26 Aug. 2011
  • Firstpage
    85
  • Lastpage
    90
  • Abstract
    This paper presents a simple technique to convert an ESOP-based reversible circuit into an online testable circuit. The technique does not require redesigning the whole circuit for integrating the testability feature, and no new garbage outputs are produced other than the garbage outputs needed for the ESOP-circuit. With a little extra hardware cost, the resultant circuit can detect online any single-bit errors. Experimental results show that the proposed technique can achieve an improvement of up to 58% in quantum cost and 99% in garbage outputs in average, compared to the previous work.
  • Keywords
    automatic test equipment; design for testability; logic circuits; logic design; ESOP-based reversible circuit; garbage output; hardware cost; online detection; online testable reversible circuit designing; quantum cost; resultant circuit; single bit error; testability feature; Circuit faults; Heating; Input variables; Logic gates; Logic testing; Quantum computing; Rails;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, Computers and Signal Processing (PacRim), 2011 IEEE Pacific Rim Conference on
  • Conference_Location
    Victoria, BC
  • ISSN
    1555-5798
  • Print_ISBN
    978-1-4577-0252-5
  • Electronic_ISBN
    1555-5798
  • Type

    conf

  • DOI
    10.1109/PACRIM.2011.6032872
  • Filename
    6032872