DocumentCode :
3487508
Title :
Design of SPST/SPDT Switches in 65nm CMOS for 60GHz applications
Author :
He, Jin ; Zhang, Y.P.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
fYear :
2008
fDate :
16-20 Dec. 2008
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents novel single-pole-single-throw (SPST) and single-pole-double-throw (SPDT) switches for 57-66 GHz band applications. At 60 GHz band, the SPST switch exhibits an insertion loss of 1.6 dB, a return loss of 16 dB, an isolation of 27 dB and an input 1-dB compression point (IP1dB) of 11 dBm; Correspondingly, the SPDT switch achieves an insertion loss of 3 dB/2.5 dB, a return loss of 12.5 dB/12 dB, an isolation of 22 dB/22 dB and an input P1 dB of 12 dBm/13 dBm in the Tx/Rx mode, respectively. The switches are designed and implemented with STMicroelectronics 1.2 V 65 nm CMOS RF process.
Keywords :
CMOS integrated circuits; semiconductor switches; CMOS; SPDT switches; SPST switches; single-pole-double-throw switches; single-pole-single-throw switches; CMOS process; Capacitors; Communication switching; Equivalent circuits; Insertion loss; Parasitic capacitance; Radio frequency; Radiofrequency integrated circuits; Switches; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location :
Macau
Print_ISBN :
978-1-4244-2641-6
Electronic_ISBN :
978-1-4244-2642-3
Type :
conf
DOI :
10.1109/APMC.2008.4958340
Filename :
4958340
Link To Document :
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