DocumentCode
3487554
Title
Design of a 3.1–10.6 GHz noise-canceling CMOS UWB receiver front-end
Author
Shi, Bo ; Michael ; Chia, Yan Wah
Author_Institution
Inst. for Infocomm Res., A*STAR, Singapore
fYear
2008
fDate
16-20 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
This paper tackles the problem by presenting the design of a 3.1-10.6 GHz noise-canceling CMOS receiver front-end for MB-OFDM UWB. A single-in-differential-out low noise amplifier (LNA) is proposed to enable the use of double-balanced mixers, without the need for a separate wideband balun. Further, noise cancellation in combination with inductive series and shunt peaking techniques are exploited to extend the circuit bandwidth and to lower the noise figure (NF) over the entire UWB band. The proposed UWB receiver front-end design is implemented in a 0.13um CMOS technology.
Keywords
CMOS integrated circuits; MMIC; low noise amplifiers; mixers (circuits); radio receivers; MB-OFDM UWB; double-balanced mixer; frequency 3.1 GHz to 10.6 GHz; low noise amplifier; noise cancellation; noise-canceling CMOS UWB receiver; size 0.13 mum; CMOS technology; Circuit noise; Circuit topology; Impedance matching; Low-frequency noise; Noise cancellation; Noise measurement; Phase noise; Radio frequency; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location
Macau
Print_ISBN
978-1-4244-2641-6
Electronic_ISBN
978-1-4244-2642-3
Type
conf
DOI
10.1109/APMC.2008.4958342
Filename
4958342
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