DocumentCode
3487992
Title
A CMOS SPDT switch
Author
Wu, Jheng-Da ; Wu, Janne-Wha ; Tu, Chih-Ho ; Tang, Ching-Wen ; Lai, Chien-You ; Lai, Bing-Jiun ; Lai, Wei-Ju ; Chi, Liang-Yeh ; Juang, Ying-Zong
Author_Institution
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi
fYear
2008
fDate
16-20 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
In this work, a novel architecture with stacked-type CMOS device is presented. The reformed CMOS switch was implemented by the TSMC 0.18 um 1P6M standard CMOS process. In order to improve power handling capability and strengthen the isolation, the proposed circuit is inserted with an excess transistor adjacent to the receiver side. The insertion loss of the designed CMOS T/R switch is about 1.9plusmn0.3 dB. The isolation is greater than 25 dB and the power handling is capable of 28 dBm at 5.8 GHz.
Keywords
CMOS integrated circuits; isolation technology; microwave switches; transistors; CMOS SPDT switch; CMOS T/R switch; CMOS switch; TSMC; excess transistor; insertion loss; isolation; power handling capability; stacked-type CMOS device; CMOS process; CMOS technology; Circuits; Immune system; Insertion loss; Loss measurement; Radio frequency; Radio transmitters; Semiconductor device measurement; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location
Macau
Print_ISBN
978-1-4244-2641-6
Electronic_ISBN
978-1-4244-2642-3
Type
conf
DOI
10.1109/APMC.2008.4958365
Filename
4958365
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