DocumentCode
3489039
Title
The chip-multithreading architecture and parallel optical interconnects
Author
Huang, Dawei ; Sze, Theresa ; Krishnamoorthy, Ashok V. ; Alamo, A.D. ; Beckman, Dan ; Fazelpour, Siamak ; Davidson, Howard ; Cooley, John ; Lytel, Rick
Author_Institution
Phys. Sci. Center, Sun MicroSystems Inc., USA
fYear
2004
fDate
28-30 June 2004
Abstract
Tens of terabits-per-second bandwidth will be required for revolutionary chip-multithreading (CMT) architectures. In this presentation, we will review the technical challenges for electrical signaling and discuss how parallel optical interconnects could be valuable in CMT architectures.
Keywords
multi-threading; optical computing; optical interconnections; reviews; chip-multithreading architecture; electrical signaling; parallel optical interconnects; revolutionary chip-multithreading architecture; technical challenge; terabits-per-second bandwidth; Bandwidth; Clocks; Crosstalk; Jitter; Multithreading; Optical interconnections; Packaging; Pins; Throughput; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Biophotonics/Optical Interconnects and VLSI Photonics/WBM Microcavities, 2004 Digest of the LEOS Summer Topical Meetings
ISSN
1099-4742
Print_ISBN
0-7803-8306-0
Type
conf
DOI
10.1109/LEOSST.2004.1338714
Filename
1338714
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