DocumentCode :
3489705
Title :
Influence of gate underlap in AM and IM MuGFETs
Author :
Lee, Chi-Woo ; Afzalian, Aryan ; Yan, Ran ; Dehdashti, Nima ; Xiong, Weize ; Colinge, Jean-Pierre
Author_Institution :
Tyndall Nat. Inst., Univ. Coll. Cork, Cork
fYear :
2008
fDate :
15-19 Sept. 2008
Firstpage :
238
Lastpage :
241
Abstract :
The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode (AM) devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode (IM) FETs.
Keywords :
accumulation layers; electric resistance; field effect transistors; FET; accumulation mode devices; current drive; drain resistance; gate underlap; inversion-mode FET; Boron; CMOS process; Doping; Educational institutions; FETs; Instruments; MOSFETs; Radio access networks; Silicon; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European
Conference_Location :
Edinburgh
ISSN :
1930-8876
Print_ISBN :
978-1-4244-2363-7
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2008.4681742
Filename :
4681742
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3489705
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