DocumentCode
3489756
Title
Application of Ti salicide process on ultra-thin SIMOX wafer
Author
Azuma, K. ; Kishi, A. ; Tanigawa, M. ; Kaneko, S. ; Naka, T. ; Ishihawa, A. ; Iguchi, K. ; Sakiyama, K.
Author_Institution
VLSI Dev. Labs., Sharp Corp., Nara, Japan
fYear
1995
fDate
3-5 Oct 1995
Firstpage
30
Lastpage
31
Abstract
Fully-depleted, ultra-thin SIMOX/CMOS is a suitable technology to achieve low voltage and high speed application because of its capability of low Vth operation. However, large resistivity of diffusion area is an issue. In this paper,a thin salicidation layer was adopted to decrease the sheet resistivity of the ultra-thin SIMOX layer. Good transistor characteristics with sheet resistivity less than one tenth of the non-silicided diffusion resistivity were achieved, and no degradation of the transistor characteristics was observed
Keywords
MOSFET; SIMOX; characteristics measurement; semiconductor device metallisation; titanium; TiSi2; fully-depleted SIMOX/CMOS; high speed application; low voltage application; salicide process; sheet resistivity; transistor characteristics; ultra-thin SIMOX wafer; Application specific integrated circuits; CMOS integrated circuits; CMOS process; CMOS technology; Conductivity; High speed integrated circuits; MOS devices; Semiconductor films; Temperature; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 1995. Proceedings., 1995 IEEE International
Conference_Location
Tucson, AZ
Print_ISBN
0-7803-2547-8
Type
conf
DOI
10.1109/SOI.1995.526445
Filename
526445
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