DocumentCode
3489880
Title
A method of extracting on-chip decoupling cap through board level
Author
Tseng, P.M. ; Chang, Joseph ; Tsai, F.Y. ; Yeh, Cliff ; Chen, Spencer
Author_Institution
Faraday Technol. Corp., Hsinchu
fYear
2008
fDate
16-20 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
A method of extracting on-chip decoupling capacitance will benefit the SI/PI engineers to complete the models in PDN and this will enhance the accurate prediction of power integrity analysis. A methodology is proposed to extract and model the on-chip decoupling capacitance through the system board level, and good results were demonstrated.
Keywords
capacitors; PDN; board level; onchip decoupling capactiance; power integrity analysis; Capacitance; Capacitors; Frequency; Impedance; Power distribution; Power system modeling; Semiconductor device noise; System-on-a-chip; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Conference_Location
Macau
Print_ISBN
978-1-4244-2641-6
Electronic_ISBN
978-1-4244-2642-3
Type
conf
DOI
10.1109/APMC.2008.4958460
Filename
4958460
Link To Document