An advanced 0.5 μm CMOS/SOI technology for practical ultrahigh-speed and low-power circuits

Author

Ipposhi, T. ; Iwamatsu, T. ; Yamaguchi, Yoshio ; Ueda, K. ; Morinaka, H. ; Mashiko, K. ; Inoue, E. ; Hirao, T.

Author_Institution

ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1995

fDate

3-5 Oct 1995

Firstpage

46

Lastpage

47

Abstract

Thin-film SOI MOSFETs offer high-speed and low-power characteristics due to reduced junction capacitance and reduced back-gate-bias effect. Therefore, thin SOI devices have been considered to be candidates for element transistor structures used in high-speed and low-power CMOS LSIs. In order to proceed to the stage of commercial application, it is necessary to demonstrate the effectiveness of SOI devices in various kinds of practical circuits. In this paper, we report an advanced 0.5 μm CMOS/SOI technology and demonstrate ultrahigh-speed and low-power operation in two kinds of typical circuits: frequency divider and adder

Keywords

CMOS integrated circuits; adders; frequency dividers; integrated circuit technology; silicon-on-insulator; very high speed integrated circuits; 0.5 micron; CMOS/SOI technology; LSIs; adder; back-gate-bias; frequency divider; junction capacitance; thin-film SOI MOSFETs; ultrahigh-speed low-power circuits; Adders; CMOS technology; Capacitance; Circuits; Delay effects; Energy consumption; Frequency conversion; Laboratories; MOS devices; Microprocessors;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1995. Proceedings., 1995 IEEE International

Conference_Location

Tucson, AZ

Print_ISBN

0-7803-2547-8

Type

conf

DOI

10.1109/SOI.1995.526453

Filename

526453