DocumentCode :
3489932
Title :
An Arithmetic Logic Unit design based on reversible logic gates
Author :
Guan, Zhijin ; Li, Wenjuan ; Ding, Weiping ; Hang, Yueqin ; Ni, Lihui
Author_Institution :
Coll. of Comput. Sci. & Tech., Nantong Univ., Nantong, China
fYear :
2011
fDate :
23-26 Aug. 2011
Firstpage :
925
Lastpage :
931
Abstract :
In this paper, a design constructing the Arithmetic Logic Unit(ALU) based on reversible logic gates as logic components is proposed. By using reversible logic gates instead of using traditional logic gates such as AND gates and OR gates, a reversible ALU whose function is the same as the traditional ALU is constructed. The presented reversible ALU reduces the information bits´ use and loss by reusing the logic information bits logically and realizes the goal of lowering power consumption.
Keywords :
logic design; logic gates; power consumption; AND gates; OR gates; arithmetic logic unit; logic components; logic information bits; power consumption; reversible logic gates; Bismuth; Computers; Educational institutions; Energy consumption; Logic functions; Logic gates; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing (PacRim), 2011 IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
ISSN :
1555-5798
Print_ISBN :
978-1-4577-0252-5
Electronic_ISBN :
1555-5798
Type :
conf
DOI :
10.1109/PACRIM.2011.6033020
Filename :
6033020
Link To Document :
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