DocumentCode
3489973
Title
Effect of package type in IC-package stress interaction design rules
Author
van Driel, W.D. ; Yang, D.G. ; Zhang, G.Q.
Author_Institution
NXP Semicond., Nijmegen
fYear
2008
fDate
20-23 April 2008
Firstpage
1
Lastpage
4
Abstract
In this paper, virtual prototyping is used to generate more accurate and efficient stress design rules for IC backend structures, in combination with packaging processes and geometry. The addressed failure mode is passivation cracks and depending on the package type or family this failure mode is easier to occur. A series of experiments are conducted to prove the effect of the package type on this IC failure mode. It is demonstrated that for successful development of IC backend structures and processes, it is essential to take into account the influence of the package in the earlier phase of IC backend development. The so-called integral design rules, accounting for all the major loading sources and history of the complete product creation process has to be used for the development of new generation semiconductors devices.
Keywords
integrated circuit packaging; semiconductor device packaging; semiconductor devices; IC backend development; IC backend structures; IC failure mode; IC-package; integral design rules; passivation cracks; product creation; semiconductors devices; stress design rules; stress interaction design rules; virtual prototyping; Assembly; Deformable models; Integrated circuit modeling; Integrated circuit packaging; Iron; Passivation; Power system modeling; Semiconductor device packaging; Stress; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008. International Conference on
Conference_Location
Freiburg im Breisgau
Print_ISBN
978-1-4244-2127-5
Electronic_ISBN
978-1-4244-2128-2
Type
conf
DOI
10.1109/ESIME.2008.4525033
Filename
4525033
Link To Document