DocumentCode
3490012
Title
Highly uniform SOI fabrication by applying voltage during KOH etching of bonded wafers
Author
Ogura, Atsushi
Author_Institution
Microelectron. Res. Labs., NEC Corp., Ibaraki, Japan
fYear
1995
fDate
3-5 Oct 1995
Firstpage
58
Lastpage
59
Abstract
Presents a new technique for thinning SOI bonded wafers by applying voltage during KOH etching. The SOI surface is etched by KOH, and voltage is applied between the supporting substrate and etchant. As a result, etching stops automatically at a certain thickness corresponding to the applied voltage. Conventional MIS etch stopping requires an additional electrode at the SOI surface, and also requires an extra process to provide good ohmic contact at the electrode. Moreover, as it is difficult to apply uniform voltage over a large area SOI active layer, an area with a diameter of only several millimeters can be thinned uniformly. Other techniques, such as scanning of limited area plasma etching and other etch stopping techniques have been proposed to make thin uniform SOI bonded wafers. Most of these techniques, however, involve relatively expensive processes such as plasma thinning, epitaxy and ion implantation. This paper proposes a low-cost etch stopping process for bonded SOI that allows variation of less than ±0.1 μm in 150mm φ wafers
Keywords
etching; ohmic contacts; silicon-on-insulator; wafer bonding; 150 mm; KOH; KOH etching; SOI fabrication; bonded wafers; etch stopping; ohmic contact; Electrodes; Epitaxial growth; Etching; Fabrication; Ohmic contacts; Plasma applications; Plasma immersion ion implantation; Substrates; Voltage; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 1995. Proceedings., 1995 IEEE International
Conference_Location
Tucson, AZ
Print_ISBN
0-7803-2547-8
Type
conf
DOI
10.1109/SOI.1995.526459
Filename
526459
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