Prediction of wafer bow through thermomechanical simulation of patterned hard coated copper films

Due to the large difference in the coefficients of thermal expansion of the materials used in advanced semiconductor manufacturing, the fabrication process of semiconductor chips leads to a wafer bow. In addition, the layers may pass through material phase changes, which generate an unwanted film stress, making the large accumulated wafer bow very difficult to handle. We have compared the wafer bow calculated from a thermomechanical finite element simulation with experiments, and developed new material models for copper and protecting layers. We have also shown how the patterning of the thin films reduces the overall wafer bow. The wafer bow has a linear dependency with respect to the coverage percentage, especially over the low coverage range. This study introduces useful hints and predicts a reduced wafer bow, which is already experimentally proved in the manufacturing process of a modern power semiconductor technology.