DocumentCode :
3490119
Title :
Comprehensive study of S/D engineering for 32 nm node CMOS in direct silicon bonded (DSB) technology
Author :
Yasutake, N. ; Nomachi, A. ; Itokawa, H. ; Morooka, T. ; Zhang, L. ; Fukushima, T. ; Harakawa, H. ; Mizushima, I. ; Azuma, A. ; Toyosihma, Y.
Author_Institution :
Process & Manuf. Eng. Center, Toshiba Corp. Semicond. Co., Yokohama
fYear :
2008
fDate :
15-19 Sept. 2008
Firstpage :
330
Lastpage :
333
Abstract :
This paper describes the fabrication process and device performance of CMOSFET with direct silicon bonded (DSB) substrate. This works offers the first comprehensive evaluation of source/drain engineering for DSB devices. Scanning spreading resistance microscopy (SSRM) technique reveals specific dopant profile that lateral diffusion along the bonding interface, in addition to the highly activated dopant at bonding interface in pMOSFET with DSB substrate. Key process condition, such as DSB thickness, hybrid formation process, source/drain engineering and optimization method are described.
Keywords :
CMOS integrated circuits; MOSFET; bonding processes; diffusion; doping profiles; elemental semiconductors; optimisation; scanning probe microscopy; silicon; CMOSFET; Si; bonding interface; direct silicon bonded substrate; dopant profile; lateral diffusion; optimization method; pMOSFET; scanning spreading resistance microscopy; size 32 nm; source/drain engineering; Bonding; Boron; CMOS process; CMOS technology; CMOSFETs; Fabrication; MOSFET circuits; Resists; Silicon; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2008. ESSDERC 2008. 38th European
Conference_Location :
Edinburgh
ISSN :
1930-8876
Print_ISBN :
978-1-4244-2363-7
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2008.4681765
Filename :
4681765
Link To Document :
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