Title :
FinFET: the prospective multi-gate device for future SoC applications
Author :
Inaba, S. ; Okano, K. ; Izumida, T. ; Kaneko, A. ; Kawasaki, H. ; Yagishita, A. ; Kanemura, T. ; Ishida, T. ; Aoki, N. ; Ishimaru, K. ; Suguro, K. ; Eguchi, K. ; Tsunashima, Y. ; Toyoshima, Y. ; Ishiuchi, H.
Author_Institution :
Center for Semicond. Res. & Dev., Toshiba Corp. Semicond. Co., Yokohama
Abstract :
This paper discusses the possibility of future large scale integration (LSI) of multi-gate device. FinFET is thought to he the most promising multi-gate device for LSI, because it easily realizes the self-aligned double-gate structure. At first, the feasibility of SRAM operation with FinFET in hp22 nm node is studied by simulation in terms of Vt fluctuation control. Next, it is demonstrated that FinFET on bulk Si substrate (bulk-FinFET) is a suitable candidate for cost-effective LSI manufacturing. The integration schemes of FinFET and planar FET on the same substrate are also developed for the fabrication of 128 Kbit SRAM ADM (array diagnostic monitor). Finally, successful SRAM cell operation is demonstrated with FinFET of Lg = 20 nm. Therefore, FinFET integrated circuit can provide a unique solution for future low-power SoC
Keywords :
MOSFET; SRAM chips; large scale integration; low-power electronics; silicon; system-on-chip; 128000 bit; FinFET integrated circuit; LSI; SRAM cell; array diagnostic monitor; fluctuation control; multigate device; planar FET; self-aligned double-gate structure; system-on-chip; FETs; FinFETs; Fluctuations; Impurities; Large scale integration; Manufacturing processes; Pulp manufacturing; Random access memory; Substrates; Toy manufacturing industry;
Conference_Titel :
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location :
Montreux
Print_ISBN :
1-4244-0303-0
DOI :
10.1109/ESSCIR.2006.307528