A low cost EEPROM design for passive RFID tags

Author

Nuykin, Andrey ; Kravtsov, Alexander ; Timoshin, Sergey ; Zubov, Igor

Author_Institution

Syst. on Chip Dept., JSC Mikron, Zelenograd, Russia

fYear

2012

fDate

1-3 Aug. 2012

Firstpage

443

Lastpage

446

Abstract

This paper presents an EEPROM ultra low cost design for RFID applications. Two different read principles of the non-volatile memory are observed: the dynamic reading and the low current static reading. We designed Dickson and latched charge-pump circuits with active and reverse-biased diode regulation. An EEPROM dissipate 1.5μW/15μW for dynamic/static 32-bit reading operations and 50μW for writing operations with the latched charge-pump circuit. A 640-bit EEPROM is fabricated in 2-poly 4-metal 0.18 μm CMOS process. The EEPROM core area is only 0.03 mm², the area of EEPROM high-voltage programming controller is 0.01 mm²/0.025mm² for latched/Dickson architectures.

Keywords

CMOS memory circuits; EPROM; charge pump circuits; diodes; integrated circuit design; radiofrequency identification; radiofrequency integrated circuits; random-access storage; 2-poly 4-metal CMOS process; Dickson charge-pump circuit; EEPROM ultra low cost design; active diode regulation; dynamic reading; latched charge-pump circuit; low current static reading; nonvolatile memory; passive RFID tags; power 1.5 muW; power 50 muW; programming controller; reverse-biased diode regulation; size 0.18 mum; word length 32 bit; word length 640 bit; Capacitors; Charge pumps; EPROM; Passive RFID tags; Radio frequency; Voltage control; EEPROM; RFID; low cost; passive; tags; transponders;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications and Electronics (ICCE), 2012 Fourth International Conference on

Conference_Location

Hue

Print_ISBN

978-1-4673-2492-2

Type

conf

DOI

10.1109/CCE.2012.6315947

Filename

6315947