• DocumentCode
    3490512
  • Title

    Independent-Gate Controlled Asymmetrical SRAM Cells in Double-Gate MOSFET Technology for Improved READ Stability

  • Author

    Kim, Jae-Joon ; Kim, Keunwoo ; Chuang, Ching-Te

  • Author_Institution
    IBM T. J. Watson Res. Center, Yorktown Heights, NY
  • fYear
    2006
  • fDate
    Sept. 2006
  • Firstpage
    74
  • Lastpage
    77
  • Abstract
    This paper presents novel asymmetrical SRAM cell topologies in double-gate technology. These cells utilize the independent-gate control to overcome the limitation of conventional device sizing for stability improvement in asymmetrical SRAM cells. We show that optimal READ stability, where the READ stability approaches the HOLD stability, can be achieved with the proposed scheme. Mixed-mode device/circuit simulations show that the proposed cell has 1.9X stability improvement over conventional SRAM and 1.5X stability improvement over asymmetrical SRAM with device sizing only
  • Keywords
    MOSFET; SRAM chips; circuit simulation; circuit stability; READ stability; double-gate MOSFET technology; independent-gate controlled asymmetrical SRAM cells; mixed-mode device/circuit simulations; Circuit simulation; Circuit stability; Circuit topology; Logic; MOSFET circuits; Optimal control; Pulse inverters; Random access memory; Stability analysis; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
  • Conference_Location
    Montreux
  • ISSN
    1930-8833
  • Print_ISBN
    1-4244-0303-0
  • Type

    conf

  • DOI
    10.1109/ESSCIR.2006.307534
  • Filename
    4099707