Low-power implementation of a residue-to-weighted conversion unit for a 5-moduli RNS

Author

Macii, Alberto ; Macii, Enrico

Author_Institution

Dipt. di Autom. e Inf., Politecnico di Torino, Italy

Volume

2

fYear

1999

fDate

5-8 Sep 1999

Firstpage

625

Abstract

Residue Number Systems (RNSs) are integer systems that enable parallel execution of arithmetic operations. Therefore, they find a wide range of applications in DSP-oriented designs. Fundamental for making RNSs usable in portable systems is the availability of power-efficient residue-to-weighted (R2W) converters. In this paper we propose an implementation of a unit of this kind, based on the precomputation optimization paradigm, that shows a 27% reduction in average pourer dissipation with respect to an existing R2W architecture specifically designed to handle a 5-moduli RNS. The area and delay penalties are kept under control in the re-designed component

Keywords

CMOS logic circuits; carry logic; convertors; logic design; low-power electronics; residue number systems; 5-moduli RNS; DSP-oriented designs; arithmetic operations; integer systems; low-power implementation; parallel execution; portable systems; power-efficient converters; precomputation optimization paradigm; residue number systems; residue-to-weighted conversion unit; Circuits; Computer architecture; Control systems; Delay; Design optimization; Digital arithmetic; Digital signal processing; Energy management; Hardware; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on

Conference_Location

Pafos

Print_ISBN

0-7803-5682-9

Type

conf

DOI

10.1109/ICECS.1999.813185

Filename

813185