A Fast Switching Full-CMOS PHS Frequency Synthesizer with an Auxiliary Coarse Tuning Method

Author

Jang, SukHwan ; Jung, SungKyu ; Park, DoJin ; Jung, JiHoon ; Kim, JinKyung ; Pu, YoungGun ; Park, JuneYoung ; Lee, Kang-Yoon

Author_Institution

Dept. of Electron. Eng., Konkuk Univ., Seoul

fYear

2006

fDate

Sept. 2006

Firstpage

94

Lastpage

97

Abstract

This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning method for PHS applications. To achieve the fast lock-time and the low phase noise performance, an efficient bandwidth control scheme is proposed. Charge pump up/down current mismatches are compensated with the current mismatch compensation block. Also, the proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about 20 mus and the phase noise is - 121dBc/radicHz at 600kHz offset. This chip is fabricated with 0.25mum CMOS technology, and the die area is 0.7mm times 2.1mm. The power consumption is 54mW at 2.7V supply voltage

Keywords

CMOS integrated circuits; circuit tuning; frequency synthesizers; phase noise; 0.25 micron; 2.7 V; 54 mW; 600 kHz; auxiliary coarse tuning method; charge pump up/down current mismatches; current mismatch compensation block; efficient bandwidth control scheme; fast lock-time; fast switching full-CMOS PHS frequency synthesizer; low phase noise performance; Bandwidth; CMOS technology; Capacitance; Charge pumps; Frequency synthesizers; Noise measurement; Optimization methods; Phase measurement; Phase noise; Tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European

Conference_Location

Montreux

ISSN

1930-8833

Print_ISBN

1-4244-0303-0

Type

conf

DOI

10.1109/ESSCIR.2006.307539

Filename

4099712