Title :
Low-swing/low power driver architecture
Author :
Rjoub, A. ; Koufopavlou, O.
Author_Institution :
Dept. of Electr. & Comput. Eng., Patras Univ., Greece
Abstract :
A new low-swing/low-power CMOS driver architecture for VLSI applications is proposed. The architecture based on low swing technique using the conventional CMOS static logic. Simulation results based on the proposed design show significant improvements in both power dissipation and power-delay product compared to other low swing techniques driver architectures. Using 0.5 μm CMOS technology, for 3.3 V power supply voltage, 40% lower power dissipation than the conventional CMOS bus is achieved. The influence of the swing level on the time performance is also examined
Keywords :
CMOS logic circuits; VLSI; driver circuits; low-power electronics; 0.5 micron; 3.3 V; CMOS static logic; VLSI applications; low power driver architecture; low-swing driver architecture; power dissipation; power-delay product; time performance; CMOS technology; Capacitance; Computer architecture; Driver circuits; Laboratories; MOSFETs; Power dissipation; Power supplies; Threshold voltage; Very large scale integration;
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
DOI :
10.1109/ICECS.1999.813188
