DocumentCode
3490611
Title
Modeling of intra-cell defects in CMOS SRAM
Author
Al-Assadi, W.K. ; Malaiya, Y.K. ; Jayasumana, A.P.
Author_Institution
Colorado State Univ., Fort Collins, CO, USA
fYear
1993
fDate
9-10 Aug 1993
Firstpage
78
Lastpage
81
Abstract
The effect of defects within a single cell of a static random access memory (SRAM) is examined. All major types of faults, including bridging, transistor stuck-open and stuck-on, are examined. A significant fraction of all faults cause high IDDQ values to be observed. Faults leading to inter-cell coupling are identified
Keywords
CMOS integrated circuits; SRAM chips; fault location; semiconductor device models; CMOS SRAM; IDDQ values; bridging; defects; fault models; intercell coupling; intra-cell defects; static random access memory; stuck-on faults; transistor stuck-open; Clocks; Computer science; Decoding; Fault diagnosis; Inverters; Random access memory; Read-write memory; SRAM chips; Semiconductor device modeling; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-4150-9
Type
conf
DOI
10.1109/MT.1993.263145
Filename
263145
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