Title :
Synchronization algorithm and FPGA implementation for Transmit-Reference UWB receiver
Author :
Nguyen, Hai Viet ; Tran, Manh Hoang
Author_Institution :
EDA Group - C9 401, Hanoi Univ. of Sci. & Technol., Hanoi, Vietnam
Abstract :
This paper proposes a practical synchronization algorithm for Transmit-Reference UWB receiver which uses sliding window and supports flexible sampling rates. Additionally, a Simulink model and implementation of synchronization algorithm in receiver by hardware description language (HDL) is also developed using model-based design. Finally, we assess impact of signal-noise-rate (SNR), number of bits quantization and sampling rate on bit-error-rate (BER).
Keywords :
error statistics; field programmable gate arrays; hardware description languages; radio receivers; synchronisation; ultra wideband communication; BER; FPGA implementation; HDL; SNR; Simulink model; bit-error-rate; bits quantization; flexible sampling rates; hardware description language; signal-noise-rate; synchronization algorithm; transmit-reference UWB receIver; Computational modeling; Delay; Educational institutions; Hardware design languages; Noise; Receivers; Synchronization; Transmitted-Reference; Ultra-Wideband; model-based design; synchronization algorithm;
Conference_Titel :
Communications and Electronics (ICCE), 2012 Fourth International Conference on
Conference_Location :
Hue
Print_ISBN :
978-1-4673-2492-2
DOI :
10.1109/CCE.2012.6315958
