DocumentCode :
3490633
Title :
A new class of fault models and test algorithms for dual-port dynamic RAM testing
Author :
Alves, V. Castro ; Kebichi, O. ; Ferreira, A.
Author_Institution :
TIMA INPG, Grenoble, France
fYear :
1993
fDate :
9-10 Aug 1993
Firstpage :
68
Lastpage :
71
Abstract :
In this paper, the authors present a new class of fault models called duplex pattern sensitive faults that represents more accurately the actual faults that can occur in dual-port DRAMs. Then, they propose an efficient linear test algorithm that allows 100% fault coverage for the considered fault model
Keywords :
DRAM chips; fault location; integrated circuit testing; dual-port DRAMs; duplex pattern sensitive faults; dynamic RAM testing; fault models; linear test algorithm; test algorithms; Cache memory; Content addressable storage; DRAM chips; Energy consumption; Fault detection; Heuristic algorithms; Random access memory; Read-write memory; Registers; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-4150-9
Type :
conf
DOI :
10.1109/MT.1993.263147
Filename :
263147
Link To Document :
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