Title :
A 90nm 8Ã\x9716 LUT-based FPGA Enhancing Speed and Yield Utilizing Within-Die Variations
Author :
Kotani, Manabu ; Katsuki, Kazuya ; Kobayashi, Kazutoshi ; Onodera, Hidetoshi
Author_Institution :
Dept. of Commun. & Comput. Eng., Kyoto Univ.
Abstract :
We have fabricated an LUT-based FPGA device with functionalities measuring within-die variations in a 90nm process. Measured variations are used to configure each device to maximize the operating frequency by allocating critical paths in faster portions. Variations are measured using ring oscillators implemented as a configuration of the FPGA. Placement optimization using a simple model circuit reveals that performance of the circuit is enhanced by 4% in average, which is the same amount as the measured within-die variations. The yield is enhanced by 32% to the worst case
Keywords :
field programmable gate arrays; oscillators; table lookup; 90 nm; LUT-based FPGA; operating frequency; placement optimization; ring oscillators; within-die variations; Circuit optimization; Counting circuits; Fabrication; Field programmable gate arrays; Hardware; Informatics; Manufacturing; Ring oscillators; Switches; Velocity measurement;
Conference_Titel :
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location :
Montreux
Print_ISBN :
1-4244-0303-0
DOI :
10.1109/ESSCIR.2006.307543
