DocumentCode
3490677
Title
Algorithms to test PSF and coupling faults in random access memories
Author
Rajsuman, Rochit
Author_Institution
Dept. of Comput. Eng., Case Western Reserve Univ., Cleveland, OH, USA
fYear
1993
fDate
9-10 Aug 1993
Firstpage
49
Lastpage
54
Abstract
With the growing complexity of semiconductor memories a good understanding of memory fault models becomes very important. In this paper, the author discusses the coupling and pattern sensitive fault (PSF) models in detail. Test algorithms to cover these faults are given. Pros and cons of different test algorithms are discussed and validity of fault models is examined
Keywords
automatic testing; circuit analysis computing; fault location; integrated circuit testing; integrated memory circuits; random-access storage; coupling faults; memory fault models; pattern sensitive fault; random access memories; semiconductor memories; test algorithms; Chemical processes; Circuit faults; Coupling circuits; Decoding; Manufacturing processes; Random access memory; Read-write memory; Semiconductor memory; Silicon; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-4150-9
Type
conf
DOI
10.1109/MT.1993.263150
Filename
263150
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