Title :
Functional testing of RAMs by random testing simulation
Author :
Ashtijou, M. ; Chen, Fusheng
Author_Institution :
Dept. of Electr. Eng., Texas A&I Univ., Kingsville, TX, USA
Abstract :
An algorithm for random testing of functional faults in RAMs based on the modification of a random testing experiment algorithm is developed. To examine the effectiveness of the algorithm for the testing of stuck-at faults, inversion 2-coupling faults, and type 1 active neighborhood pattern sensitive faults on a reduced memory model, the authors present a simulation package
Keywords :
automatic testing; circuit analysis computing; digital simulation; fault location; integrated circuit testing; integrated memory circuits; random-access storage; RAMs; functional faults; inversion 2-coupling faults; pattern sensitive faults; random testing simulation; reduced memory model; simulation package; stuck-at faults; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Fault detection; Mathematical model; Performance evaluation; Probability; Random access memory; Read-write memory;
Conference_Titel :
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-4150-9
DOI :
10.1109/MT.1993.263151
