DocumentCode :
3490713
Title :
Modeling of faulty behavior of ECL storage elements
Author :
Menon, S.M. ; Malaiya, Yashwant K. ; Jayasumana, Anura P.
Author_Institution :
Colorado State Univ., Ft. Collins, CO, USA
fYear :
1993
fDate :
9-10 Aug 1993
Firstpage :
31
Lastpage :
36
Abstract :
Bipolar emitter coupled logic (ECL) devices can now be fabricated at very high densities and much lower power consumption. Behavior of two different ECL storage element implementations are examined in the presence of physical faults. While fault models for some implementations of CMOS storage elements have been examined, not much attention has been paid to ECL storage elements. The conventional stuck-at fault model termed minimal fault model assumes that an input (output) of a storage element can be stuck-at-1 or 0. The minimal fault model may not model the behavior under certain physical failures in a storage element. The enhanced fault model providing higher coverage of physical failures is presented
Keywords :
bipolar integrated circuits; emitter-coupled logic; failure analysis; fault location; integrated memory circuits; ECL storage elements; bipolar ECL devices; emitter coupled logic; fault models; faulty behaviour modelling; physical failures; physical faults; CMOS logic circuits; Circuit faults; Circuit testing; Computer science; Costs; Energy consumption; Logic devices; Power dissipation; Semiconductor device modeling; Sequential analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Testing, 1993., Records of the 1993 IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-4150-9
Type :
conf
DOI :
10.1109/MT.1993.263153
Filename :
263153
Link To Document :
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