Mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm and architecture for scaling-free high-performance rotational operations

In this paper, we propose the mixed-scaling-rotation CORDIC (MSR-CORDIC) algorithm which merges micro-rotation operation and scaling operation in conventional CORDIC algorithms to eliminate the overhead of the scaling operation. At the system architecture level, we propose the data-path-selection (DPS) strategy for the tradeoff between hardware complexity and quantization error performance. In general, the CORDIC algorithms suffer from the roundoff noise in fixed-wordlength implementations. We propose two schemes to control and reduce the impairment. Our simulation results show that MSR-CORDIC enhances the SQNR performance, computing speed (reducing the iteration number), and reduces the hardware complexity when compared with the newly proposed EEAS-CORDIC algorithm.