DocumentCode :
3491070
Title :
Thermo-mechanics of 3D-wafer level and 3D stacked IC packaging technologies
Author :
Vandevelde, Bart ; Okoro, Chukwudi ; Gonzalez, Mario ; Swinnen, Bart ; Beyne, Eric
Author_Institution :
IMEC, Leuven
fYear :
2008
fDate :
20-23 April 2008
Firstpage :
1
Lastpage :
7
Abstract :
The miniaturisation 3D integration/stacking systems has a significant impact on both thermal resistance and thermo-mechanical reliability. The trends regarding these issues are summarised for the different 3D integration approaches: 3D-SIP, 3D-WLP and 3D-SIC.
Keywords :
integrated circuit packaging; thermal resistance; 3D stacked IC packaging technologies; 3D-wafer level thermomechanics; different 3D integration approach; miniaturisation 3D integration-stacking systems; thermal resistance; thermomechanical reliability; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Isolation technology; Passivation; Stacking; Temperature; Thermal resistance; Thermomechanical processes; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro-Systems, 2008. EuroSimE 2008. International Conference on
Conference_Location :
Freiburg im Breisgau
Print_ISBN :
978-1-4244-2127-5
Electronic_ISBN :
978-1-4244-2128-2
Type :
conf
DOI :
10.1109/ESIME.2008.4525106
Filename :
4525106
Link To Document :
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