A Sub 1V 96 μW Fully Operational Digital Hearing Aid Chip With Internal Status Controller

Author

Kim, Sunyoung ; Cho, Namjun ; Song, Seong-Jun ; Kim, Donghyun ; Kim, Kwanho ; Yoo, Hoi-Jun

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

2006

fDate

19-21 Sept. 2006

Firstpage

231

Lastpage

234

Abstract

A low power fully operational digital hearing aid chip is proposed and implemented. The Sigma-Delta ADC adopts the status controller to realize adaptive SNR technique without any external control. To achieve both low power consumption and high programmability, dedicated low power DSP with 6 control parameters is designed. The heterogeneous Sigma-Delta DAC reduces more power dissipation without performance degradation. The digital hearing aid system is fabricated in 0.18 mum CMOS technology, consumes less than 96 muW and has a die size of 2.8 mm times 1.1 mm

Keywords

CMOS digital integrated circuits; controllers; hearing aids; low-power electronics; sigma-delta modulation; 0.18 micron; CMOS technology; adaptive SNR technique; digital hearing aid chip; digital hearing aid system; internal status controller; low power DSP; low power electronics; sigma-delta ADC; sigma-delta DAC; Adaptive control; Auditory system; Clocks; Digital signal processing; Digital signal processing chips; Energy consumption; Finite impulse response filter; Frequency; Power dissipation; Programmable control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European

Conference_Location

Montreux

ISSN

1930-8833

Print_ISBN

1-4244-0303-0

Type

conf

DOI

10.1109/ESSCIR.2006.307573

Filename

4099746