DocumentCode
3491191
Title
A 90nm 8b 120Ms/s-250Ms/s pipeline ADC
Author
Picolli, L. ; Malcovati, P. ; Crespi, L. ; Chaahoub, F. ; Baschirotto, A.
fYear
2008
fDate
15-19 Sept. 2008
Firstpage
266
Lastpage
269
Abstract
A dual operating mode 8b, 1.1V, 120 MHz/250 MHz, 9.4 mW/22.8 mW pipeline ADC for Gb Ethernet applications is presented. Considering 60 MHz of signal bandwidth in both operating modes, the ADC achieves a peak SNDR of 44.1dB/40.7dB (7b/6.5b ENOB), featuring a minimum FoM of 0.84 pJ/conv at 120 MHz and 2.2 pJ/conv at 250 MHz. A 90 nm CMOS technology was used to integrate the ADC whose active area is 1.25 times 0.65 mm2.
Keywords
CMOS integrated circuits; analogue-digital conversion; pipeline arithmetic; CMOS technology; Gb Ethernet applications; frequency 120 MHz; frequency 250 MHz; pipeline ADC; power 22.8 mW; power 9.4 mW; size 90 nm; voltage 1.1 V; Bandwidth; CMOS technology; Clocks; Energy consumption; Ethernet networks; Operational amplifiers; Pipelines; Sampling methods; Switches; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location
Edinburgh
ISSN
1930-8833
Print_ISBN
978-1-4244-2361-3
Electronic_ISBN
1930-8833
Type
conf
DOI
10.1109/ESSCIRC.2008.4681843
Filename
4681843
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