A reconfigurable 65nm SRAM achieving voltage scalability from 0.25–1.2V and performance scalability from 20kHz–200MHz

Author

Sinangil, Mahmut E. ; Verma, Naveen ; Chandrakasan, Anantha P.

Author_Institution

Massachusetts Inst. of Technol., Cambridge, MA

fYear

2008

fDate

15-19 Sept. 2008

Firstpage

282

Lastpage

285

Abstract

A 64 kb SRAM array fabricated in 65 nm low-power CMOS operates from 250 mV to 1.2 V. This wide supply range is enabled by a combination of circuits optimized for both sub-V_t and above-V_t regimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20 kHz with a 250 mV supply and 200 MHz with a 1.2 V supply. Over this range the leakage power scales by more than 50X.

Keywords

CMOS integrated circuits; SRAM chips; SRAM array; frequency 20 kHz to 200 MHz; low voltage assist circuits; low-power CMOS; performance scalability; reconfigurable SRAM; reconfigurable circuits; size 65 nm; voltage 0.25 V to 1.2 V; voltage scalability; Biosensors; CMOS technology; Circuit topology; Dynamic voltage scaling; Energy consumption; Frequency; Low voltage; Random access memory; Scalability; Wireless sensor networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European

Conference_Location

Edinburgh

ISSN

1930-8833

Print_ISBN

978-1-4244-2361-3

Electronic_ISBN

1930-8833

Type

conf

DOI

10.1109/ESSCIRC.2008.4681847

Filename

4681847