Current reuse CMOS LNA for UWB applications

To comply with the low power low voltage design constrains in modern RF CMOS technologies, a new LNA topology is here proposed. Implemented in a standard 130 nm CMOS technology, two circuits operating under a 1.4 V nominal voltage are reported. The first one dedicated to lower band of European UWB allocation -i.e. 3-5 GHz- achieves a 13.8 dB maximum gain for a 5.8 mA current consumption. NF is so included in a 4.2 to 6.1 dB range. The second LNA addresses the 6-10 GHz upper band. It performs a 12.2 dB maximum gain and a 4.5 dB NF_min for a 3 mA current consumption. Both circuits exhibit a more than -10 dB input return loss over the considered bandwidth. S₂₁ even reaches a 9 dB and 11 dB, respectively, when LNA core is supplied under 0.9 V. Matching the input network order to the addressed bandwidth affords each circuit implementation to be included within a 1.8 mm² silicon area.