Title :
CASTLE: an emulated digital CNN architecture design issues, new results
Author :
Zarándy, Akos ; Keresztes, P. ; Roska, Tamhs ; Szolgay, Péter
Author_Institution :
Comput. & Autom. Inst., Hungarian Acad. of Sci., Budapest, Hungary
Abstract :
A new emulated digital CNN universal machine chip architecture is introduced in this paper. The chip contains 24 CNN core processors using 70 mm2 silicon area with a 0.35 μm technology. Its speed is 1 ns/virtual cells/CNN iterations with 12 bit precision. This enables one to execute over five hundred 3×3 convolutions on each frame of a 240×320 sized 25 fps (standard NTSC) digital image flow. Another new feature of the design is the different precision capability. This allows the user to convert precision to speed
Keywords :
CMOS digital integrated circuits; VLSI; cellular neural nets; convolution; image resolution; integrated circuit design; neural chips; 0.35 micron; CASTLE; architecture design; convolutions; core processors; digital CNN architecture; digital image flow; precision capability; universal machine chip architecture; Biomedical optical imaging; Cellular neural networks; Computer architecture; Convolution; Equations; Image processing; Optical feedback; Silicon; Turing machines; Very large scale integration;
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
DOI :
10.1109/ICECS.1998.813303
