DocumentCode
3491722
Title
A 0.3μW, 7 ppm/°C CMOS Voltage reference circuit for on-chip process monitoring in analog circuits
Author
Ueno, Ken ; Hirose, Tetsuya ; Asai, Tetsuya ; Amemiya, Yoshihito
Author_Institution
Dept. of Electr. Eng., Hokkaido Univ., Sapporo
fYear
2008
fDate
15-19 Sept. 2008
Firstpage
398
Lastpage
401
Abstract
A CMOS voltage reference circuit for on-chip process compensation in analog circuits has been developed in 0.35-mum CMOS process. The circuit generates a reference voltage based on threshold voltage of a MOSFET at absolute zero temperature. Theoretical analyses and experimental results showed that the circuit generates a quite stable reference voltage of 745 mV on average. The temperature coefficient and line sensitivity of the circuit were 7 pp/mdegC and 0.002%/V, respectively. The circuit consists of subthreshold MOSFETs with a low-power dissipation of 0.3 muW or less. By utilizing the nature of the reference voltage, which changes with the process conditions of threshold voltage in each LSI chip, the circuit can be used as an elementary circuit block for on-chip process compensation systems.
Keywords
CMOS analogue integrated circuits; MOSFET; large scale integration; reference circuits; CMOS voltage reference circuit; LSI chip; MOSFET; analog circuits; elementary circuit block; on-chip process compensation; on-chip process monitoring; power 0.3 muW; size 0.35 mum; voltage 745 mV; Analog circuits; CMOS analog integrated circuits; CMOS process; CMOS technology; Large scale integration; MOSFET circuits; Monitoring; Resistors; Temperature sensors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Conference_Location
Edinburgh
ISSN
1930-8833
Print_ISBN
978-1-4244-2361-3
Electronic_ISBN
1930-8833
Type
conf
DOI
10.1109/ESSCIRC.2008.4681876
Filename
4681876
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