DocumentCode
3491767
Title
A Clock-Less 10-bit Pipeline A/D Converter for Self-Triggered Sensors
Author
Picolli, L. ; Rossini, A. ; Malcovati, P. ; Maloberti, F. ; Baschirotto, A.
Author_Institution
Dept. of Electr. Eng., Pavia Univ.
fYear
2006
fDate
Sept. 2006
Firstpage
384
Lastpage
387
Abstract
In this paper a novel 10-bit pipeline A/D converter for low noise, self-triggered sensors is presented. The main innovative feature of the proposed A/D structure is the concept that a pipeline ADC may behave as a combinatorial logic and may operate without any timing signal (clock) in order to produce the conversion (assuming that a sampled signal is provided at the input). This concept is validated by the experimental results here reported. A prototype ADC has been fabricated in a standard 0.35mum CMOS technology, has an active area of 2.24mm2, provides a conversion in 2.5mus (400kS/s) and consumes 14mW from a 2.3V power supply
Keywords
CMOS integrated circuits; analogue-digital conversion; combinational circuits; sensors; 0.35 micron; 14 mW; 2.3 V; CMOS technology; clock-less pipeline A/D converter; combinatorial logic; low noise sensors; self-triggered sensors; Adders; CMOS technology; Circuits; Clocks; Hysteresis; Pipelines; Semiconductor device noise; Sensor arrays; Spectroscopy; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location
Montreux
ISSN
1930-8833
Print_ISBN
1-4244-0303-0
Type
conf
DOI
10.1109/ESSCIR.2006.307611
Filename
4099784
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