Title :
New short and efficient algorithm for testing random-access memories
Author :
Azimane, Mohamed ; Ruiz, Antonio Lloris
Author_Institution :
Dept. of Electron. & Comput. Technol., Granada Univ., Spain
Abstract :
Rapid developments in semiconductor technology have made denser semiconductors memories on a chip a reality, but the efficient testing of such devices has been recognized as a difficult problem, both economical and functionally. This paper present an optimal march test, called DITEC, to detect all fault models in random access memories. DITEC proves to be more efficient and shorter than previous march tests
Keywords :
automatic testing; cellular arrays; fault diagnosis; integrated circuit testing; logic testing; random-access storage; DITEC; IC testing; dense semiconductor memories; fault models; optimal march test; random-access memories; semiconductor technology; Decoding; Delay effects; Electronic equipment testing; Fault detection; Logic; Random access memory; Read-write memory; Semiconductor device testing; Semiconductor memory;
Conference_Titel :
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location :
Lisboa
Print_ISBN :
0-7803-5008-1
DOI :
10.1109/ICECS.1998.813380
