A multi-GOPS SIMD core for systematic signal processing

In many digital signal processing applications, the major computational load is spent on front-end processing. This front-end processing is mainly based on systematic loops that do not need general purpose DSPs. We describe in this paper a programmable signal processing IP (Intellectual Property) which offers the computation power of several DSP cores thanks to the opportunities of simplifications allowed by systematic processing. After a brief description of the aimed class of applications and the architecture of the processor core, the paper describes the programming tools developed for this IP. Those tools permit easy programming by taking advantage of the regularity of the tasks performed