• DocumentCode
    3491952
  • Title

    Analysis of a heuristic mapping method for parallel real-time simulation of electrical networks

  • Author

    Wong, Tony ; Rosu, C. ; Houle, Jean-Louis

  • Author_Institution
    Ecole de Technol. Superieure, Montreal, Que., Canada
  • Volume
    2
  • fYear
    1995
  • fDate
    5-8 Sep 1995
  • Firstpage
    925
  • Abstract
    This paper presents an analysis of a heuristic mapping method used in the scheduling of parallel real-time tasks. Tasks arise when an electrical network, targeted for simulation, is broken down into real-time schedulable objects with resource requirements and timing constraints. Also, tasks are characterized by their worst-ease execution times and their hard deadlines. Results from computer simulations show the dynamic behavior of the mapping method
  • Keywords
    digital simulation; electrical engineering computing; parallel programming; real-time systems; scheduling; computer simulations; electrical networks; hard deadlines; heuristic mapping method; parallel real-time simulation; parallel real-time tasks; resource requirements; scheduling; timing constraints; worst-ease execution times; Analytical models; Computational modeling; Computer networks; Computer simulation; Concurrent computing; Cost function; Network topology; Processor scheduling; Search methods; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Computer Engineering, 1995. Canadian Conference on
  • Conference_Location
    Montreal, Que.
  • ISSN
    0840-7789
  • Print_ISBN
    0-7803-2766-7
  • Type

    conf

  • DOI
    10.1109/CCECE.1995.526579
  • Filename
    526579