• DocumentCode
    3492045
  • Title

    A Wide Operating Frequency Range Delay-Locked Loop Using a Recursive D/A Converter

  • Author

    Lim, Byong-Chan ; Jo, In-Joon ; Park, Dong-Soo ; Hong, Kuk-Tae

  • Author_Institution
    Circuit Design Gr., LG Electron. Inc., Seoul
  • fYear
    2006
  • fDate
    19-21 Sept. 2006
  • Firstpage
    456
  • Lastpage
    459
  • Abstract
    A wide operating frequency range, false-lock free delay-locked loop with mixed-mode calibration is presented. The recursive D/A converter in the auxiliary circuit expands the operating frequency range with minimum hardware by controlling the capacitive loading of a delay cell. Moreover, the sampling phase detector with the D/A converter automatically tracks the false-lock free condition. The proposed DLL with equally spaced 14-phase clock outputs is implemented in 0.18-mum, 3.3V digital CMOS process, and its operating frequency ranges from 15MHz to 270MHz. The measured peak-to-peak jitter and rms jitter at 270MHz are 33.3psec and 3.93psec, respectively. The DLL occupies 0.22mm2 and consumes 19mA
  • Keywords
    CMOS digital integrated circuits; delay lock loops; digital-analogue conversion; phase detectors; 0.18 micron; 15 to 270 MHz; 19 mA; 3.3 V; 3.93 ps; 33.3 ps; DLL; auxiliary circuit; delay cell capacitive loading; delay-locked loop; digital CMOS process; mixed-mode calibration; phase detector; recursive D/A converter; Calibration; Circuits; Delay; Detectors; Frequency conversion; Frequency locked loops; Hardware; Jitter; Phase detection; Sampling methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
  • Conference_Location
    Montreux
  • ISSN
    1930-8833
  • Print_ISBN
    1-4244-0303-0
  • Type

    conf

  • DOI
    10.1109/ESSCIR.2006.307479
  • Filename
    4099802