DocumentCode
3492130
Title
8Gbps Parallel Data Transmission with Adaptive I/O Circuit
Author
Takahashi, Eiichi ; Endou, Nobuharu ; Kasai, Yuji ; Iwata, Masaya ; Sakanashi, Hidenori ; Higuchi, Tetsuya
Author_Institution
MIRAI, National Inst. of Adv. Ind. Sci. & Technol., Tsukuba
fYear
2006
fDate
19-21 Sept. 2006
Firstpage
472
Lastpage
475
Abstract
This paper describes an adaptive I/O circuit capable of 8Gbps parallel data transmission over 140cm lines. The parameters for waveform control are automatically determined to optimal values within a short time
Keywords
data communication; 140 cm; 8 Gbit/s; adaptive I/O circuit; parallel data transmission; waveform control; Automatic control; Bit error rate; Circuit testing; Data communication; Driver circuits; Equalizers; Galois fields; Large scale integration; Signal generators; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European
Conference_Location
Montreux
ISSN
1930-8833
Print_ISBN
1-4244-0303-0
Type
conf
DOI
10.1109/ESSCIR.2006.307483
Filename
4099806
Link To Document