A 1.2V, 17dBm digital polar CMOS PA with transformer-based power interpolating

Targeting for WLAN applications, this paper presents a digital polar power amplifier in a 65 nm digital CMOS process, with 17 dBm maximum RMS output power at 1.2 V supply voltage. To reduce the out-of-band alias caused in the direct digital-to-RF power conversion, a transformer-based power interpolating technique is implemented. This also improves the average efficiency by adaptively configuring the interpolation stages. The measured power added efficiency remains between 8.9% and 12.7% over power range from 12 dBm to 17 dBm. The achieved power level allows for eliminating the commonly used external PA stage.