Design and Integration of All-Silicon Fiber-Optic Receivers for Multi-Gigabit Chip-to-Chip Links

Author

Muller, P. ; Leblebici, Y. ; Emsley, M.K. ; Ünlü, M.S. ; Tajalli, A. ; Atarodi, M.

Author_Institution

Microelectron. Syst. Lab., Ecole Polytechnique Federale de Lausanne

fYear

2006

fDate

Sept. 2006

Firstpage

480

Lastpage

483

Abstract

This paper presents a top-down approach to the design of all-silicon CMOS-based fully integrated optical receivers. From the system-level requirements, we determine the optimum block-level specifications, based on which the individual building blocks are designed. Measurement results of the manufactured design show operation at data rates exceeding 2.5-Gbps/channel for the detector, the amplification and the clock and data recovery circuits. This proof of concept is the first step towards design optimized, completely integrated, multi-channel optical receivers for high-bandwidth short-distance chip-to-chip interconnects

Keywords

CMOS integrated circuits; integrated circuit design; integrated optoelectronics; optical receivers; CMOS-based fully integrated optical receivers; all-silicon fiber-optic receivers; chip-to-chip interconnects; clock recovery circuits; data recovery circuits; multichannel optical receivers; multigigabit chip-to-chip links; Bit error rate; Clocks; Detectors; High speed optical techniques; Integrated optics; Optical design; Optical receivers; Optical resonators; Optical transmitters; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European

Conference_Location

Montreux

ISSN

1930-8833

Print_ISBN

1-4244-0303-0

Type

conf

DOI

10.1109/ESSCIR.2006.307494

Filename

4099808