Impact analysis of packet-level scheduling on an ATM shared-memory switch

Author

Fulton, Cathy ; Li, Sa-qi ; Lin, Arthur

Author_Institution

End-to-End Simulation Dept., Schlumberger APC-Res., Austin, TX, USA

Volume

3

fYear

1998

fDate

29 Mar-2 Apr 1998

Firstpage

947

Abstract

This paper evaluates the additional buffer requirements of an ATM shared-memory switch using packet-level (store-and-forward) rather than cell-level (cut-through) service scheduling. Packet-level scheduling is important to tag and IP switching for multipoint-to-one services; it allows different connections to be merged into a single virtual connection to reduce routing complexity. Cisco Systems will incorporate packet-level scheduling in their LightStream 1010 ATM switch using a feature upgrade card possessing per flow queueing; we thus specifically consider the LightStream 1010 architecture in our analysis

Keywords

asynchronous transfer mode; buffer storage; queueing theory; scheduling; shared memory systems; telecommunication network routing; ATM shared-memory switch; Cisco Systems; IP switching; LightStream 1010 ATM switch; additional buffer requirements; feature upgrade card; multipoint-to-one services; packet-level scheduling; per flow queueing; routing complexity; store-and-forward service scheduling; tag switching; virtual connection; Asynchronous transfer mode; Buffer storage; Merging; Packet switching; Queueing analysis; Routing; Scheduling; Switches; Traffic control; Virtual colonoscopy;

fLanguage

English

Publisher

ieee

Conference_Titel

INFOCOM '98. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Proceedings. IEEE

Conference_Location

San Francisco, CA

ISSN

0743-166X

Print_ISBN

0-7803-4383-2

Type

conf

DOI

10.1109/INFCOM.1998.662903

Filename

662903