Analysis of ACPR performance for memoryless predistorter considering power amplifier memory effects

Author

Ku, Hyunchul ; Kenney, J. Stevenson

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

3

fYear

2004

fDate

6-11 June 2004

Firstpage

1863

Abstract

Memory effects in a power amplifier (PA) limit the improvement of performance for predistortion linearizers based on memoryless look-up table (LUT) or model-based architectures. This paper investigates degradation of the adjacent channel power ratio (ACPR) improvement for a PA with memoryless predistortion linearizer with respect to the memory effects. Using the input and output complex envelope signals of PA, the ACPR degradation due to memory effects is analytically extracted. A 170 W PEP LDMOS PA is measured and its ACPR performance degradation due to memory effects is analyzed using a memoryless predistortion linearizer.

Keywords

Volterra series; linearisation techniques; memoryless systems; nonlinear distortion; power amplifiers; table lookup; 170 W; PEP LDMOS PA; Volterra series; adjacent channel power ratio; complex envelope signal; input-output signals; memory effects; memoryless look-up table; memoryless predistorter; model-based architecture; power amplifier; power ratio degradation; predistortion linearizer; Computer architecture; Degradation; Hardware; Interference; Performance analysis; Power amplifiers; Power engineering and energy; Power engineering computing; Predistortion; Table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 2004 IEEE MTT-S International

ISSN

0149-645X

Print_ISBN

0-7803-8331-1

Type

conf

DOI

10.1109/MWSYM.2004.1338970

Filename

1338970