DocumentCode :
349277
Title :
Packaging optoelectronic stacked processors and free-space optical interconnects
Author :
Esener, S. ; Marchand, P. ; Ozguz, V. ; Liu, Y. ; Huang, D. ; Zheng, X.
Author_Institution :
California Univ., San Diego, La Jolla, CA, USA
Volume :
1
fYear :
1999
fDate :
1999
Firstpage :
94
Abstract :
The 3D-OESP Consortium is a government-industry-university collaboration dedicated to the development of the technologies required to integrate stacked silicon chips with optoelectronic devices for high-performance computing and switching applications
Keywords :
integrated circuit packaging; integrated optoelectronics; optical computing; optical interconnections; parallel architectures; 3D-OESP Consortium; free-space optical interconnects; government-industry-university collaboration; high-performance computing; optoelectronic devices; optoelectronic stacked processor packaging; stacked silicon chips; switching applications; Computer architecture; Hardware; Optical arrays; Optical interconnections; Optical receivers; Optical sensors; Packaging; Power system interconnection; Silicon; Stacking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
LEOS '99. IEEE Lasers and Electro-Optics Society 1999 12th Annual Meeting
Conference_Location :
San Francisco, CA
ISSN :
1092-8081
Print_ISBN :
0-7803-5634-9
Type :
conf
DOI :
10.1109/LEOS.1999.813493
Filename :
813493
Link To Document :
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